Publications

As a Carnegie Research-1 university and longstanding member of the American Association of Universities (AAU), Pitt considers scholarship of primary importance, where innovations in basic and applied research as well as education are featured in refereed journal articles and conference papers.

This page (presently under construction) features a database of scholarly publications showcasing a wide variety of space research and education of impact from Pitt faculty and students. 

In addition, as part of our ongoing Pitt Space Seminar Series, presentations (both slides and video) from our various speakers in the space community are posted.

Publications Search

Year Title Authors View/Download
2009 Runtime Temporal Partitioning Assembly to Reduce FPGA Reconfiguration Time A. Jara-Berrocal and A. Gordon-Ross PDF
2010 Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing J. Curreri, S. Koehler, A. George, B. Holland, and R. Garcia PDF
2010 Voter Insertion Algorithms for FPGA Designs Using Triple Modular Redundancy J. Johnson and M. Wirthlin PDF
2010 Using Statistical Models with Duplication and Compare for Reduced Cost FPGA Reliability J. Anderson, B. Nelson, and M. Wirthlin PDF
2010 A Comparison of Fault-Tolerant Memories in SRAM-Based FPGAs N. Rollins, M. Fuller, and M. Wirthlin PDF
2010 VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems A. Jara-Berrocal and A. Gordon-Ross PDF
2010 Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing E. El-Araby, V. Narayana, and T. El-Ghazawi PDF
2010 Performance Visualization and Exploration for Reconfigurable Computing Applications S. Koehler and A. George PDF
2010 Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization B. Pratt, M. Fuller, M. Rice, and M. Wirthlin PDF
2010 DAPR: Design Automation for Partially Reconfigurable FPGAs S. Yousuf and A. Gordon-Ross PDF
2010 Integrating Application Specification and Performance Prediction for Strategic Design-Space Exploration B. Holland, A. George, and H. Lam PDF
2010 Acceleration of FPGA Fault Injection through Multi-Bit Testing G. Cieslewski, A. George, and A. Jacobs PDF
2010 An Automated Scheduling and Partitioning Algorithm for Scalable RC Systems, C. Reardon, A. George, G. Stitt, and H. Lam PDF
2010 Reconfigurable Supercomputing with Scalable Systolic Arrays and In-Stream Control for Wavefront Genomics Processing C. Pascoe, A. Lawande, H. Lam, A. George, Y. Sun, W. Farmerie, and M. Herbordt PDF
2010 Using Hard Macros to Reduce FPGA Compilation Time C. Lavin, M. Padilla, S. Ghosh, B. Nelson, B. Hutchings, and M. Wirthlin PDF
2010 Increasing Design Productivity Through Core Reuse, Meta-Data Encapsulation, and Synthesis A. Arnesen, K. Ellsworth, D. Gibelyou, T. Haroldsen, J. Havican, M. Padilla, B. Nelson, M. Rice, and M. Wirthlin PDF
2010 A First Look at Integrated GPUs for Green High-Performance Computing, T. Scogland, H. Lin, and W. Feng PDF
2010 Performance Modeling for Multilevel Communication in SHMEM+ V. Aggarwal, C. Yoon, A. George, H. Lam, and G. Stitt PDF
2010 Virtual Architectures for Circuit Portability and Fast Placement and Routing J. Coole and G. Stitt PDF
2010 On The Use of Rapid Prototyping for Designing PCM/FM Demodulators in FPGAs M. Rice, B. Nelson, M. Padilla, and J. Havican PDF
2010 A Simulation Framework for Rapid Analysis of Reconfigurable Computing Systems C. Reardon, E. Grobelny, A. George, and G. Wang PDF
2010 Characterization of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration J. Williams, A. George, J. Richardson, K. Gosrani, C. Massie, and H. Lam PDF
2010 Synchronization Techniques for Crossing Multiple Clock Domains in FPGA-Based TMR Circuits Y. Li, B. Nelson, M. Wirthlin PDF
2011 High-level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis J. Curreri, G. Stitt, and A. George PDF
2011 A Framework for Evaluating High-Level Design Methodologies for High-Performance Reconfigurable Computers E. El-Araby, S. Merchant, and T. El-Ghazawi PDF
2011 Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs N. Rollins and M. Wirthlin PDF
2011 Experiences with UPC on TILE-64 processor O. Serres, A. Anbar, S. Merchant and T. El-Ghazawi PDF
2011 SCIPS: An Emulation Methodology for Fault Injection in Processor Caches N. Wulf, G. Cieslewski, A. Gordon-Ross, and A. George PDF
2011 HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping C. Lavin, M. Padilla, J. Lamprecht, P. Lundrigan, B. Nelson, and B. Hutchings PDF
2011 Address translation optimization for Unified Parallel C multi-dimensional arrays O. Serres, A. Anbar, S. G. Merchant, A. Kayi and T. El-Ghazawi PDF
2011 On the Efficacy of a Fused CPU+GPU Processor for Parallel Computing M. Daga, A. Aji, and W. Feng PDF
2011 An End-to-End Tool Flow for FPGA-Accelerated Scientific Computing G. Stitt, A. George, H. Lam, M. Smith, V. Aggarwal, G. Wang, C. Reardon, B. Holland, S. Koehler, and J. Coole PDF
2011 SHMEM+: A Multilevel-PGAS Programming Model for Reconfigurable Supercomputing V. Aggarwal, A. George, C. Yoon, K. Yalamanchili, and H. Lam PDF
2011 An Analytical Model for Multi-Level Performance Prediction of Multi-FPGA Systems B. Holland, A. George, H. Lam, and M. Smith PDF
2011 Platform-Aware Bottleneck Detection for Reconfigurable Computing Applications S. Koehler, G. Stitt, and A. George PDF
2011 XDL-Based Module Generators for Rapid FPGA Design Implementation S. Ghosh and B. Nelson PDF
2011 RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs C. Lavin, M. Padilla, J. Lamprecht, P. Lundrigan, B. Nelson and B. Hutchings PDF
2011 An Integrated Development Toolset and Implementation Methodology for Partially Reconfigurable System-on-Chips A. Jara-Berrocal and A. Gordon-Ross PDF
2011 Performance Characterization and Optimization of Atomic Operations on AMD GPUs M. Elteir, H. Lin, and W. Feng PDF
2011 An Architecture for Reconfigurable Multi-core Explorations O. Serres, V.K. Narayana and T. El-Ghazawi PDF
2011 Spectral Method Characterization of FPGA and GPU Accelerators K. Pereira, P. Athanas, H. Lin, and W. Feng PDF
2011 Formulation-level Design Space Exploration for Partially Reconfigurable FPGAs R. Kumar and A. Gordon-Ross PDF
2011 Partially Reconfigurable System-on-Chips for Adaptive Fault Tolerance S. Yousuf and A. Gordon-Ross PDF
2011 Communication Visualization for Bottleneck Detection of High-Level Synthesis Applications J. Curreri, G. Stitt, and A. George PDF
2012 Reliability of a Softcore Processor in a Commercial SRAM-Based FPGA N. Rollins and M. Wirthlin PDF
2012 VirtualRC: A Virtual FPGA Platform for Applications and Tools Portability R. Kirchgessner, G. Stitt, A. George, and H. Lam PDF
2012 Energy Budgeting for CubeSats with an Integrated FPGA S. Arnold, R. Nuzzaci, J. Antoon, and A. Gordon-Ross PDF
2012 A Framework to Analyze, Compare, and Optimize High-Performance, On-Board Processing Systems N. Wulf, A. George, and A. Gordon-Ross PDF
2012 A Comparative Study of Cloud Computing Middleware C. El Amrani, K. B. Filali, K. B.Ahmed, A. T. Diallo, S. Telolahy and T. El-Ghazawi PDF
2012 OpenCL and the 13 Dwarfs: A Work in Progress W. Feng, H. Lin, T. Scogland, J. Zhang PDF

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