2012 |
Bandwidth-Sensitivity-Aware Arbitration for FPGAs |
L. Hao, G. Stitt |
PDF |
2013 |
Virtual Finite-state-machine Architectures for Fast Compilation and Portability |
L. Hao, G. Stitt |
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2014 |
Fast and Flexible High-Level Synthesis from OpenCL using Reconfiguration Contexts |
J. Coole, G. Stitt |
PDF |
2016 |
Configuration Prefetching and Reuse for Preemptive Hardware Multitasking on Partially Reconfigurable FPGAs |
A. Morales-Villanueva, R. Kumar, and A. Gordon-Ross |
PDF |
2014 |
Optimization and Evaluation of Image- and Signal-Processing Kernels on the TI C6678 Multi-Core DSP |
B. Ramesh, A. Bhardwaj, J. Richardson, A. George, H. Lam |
PDF |
2015 |
Partial Region and Bitstream Cost Models for Hardware Multitasking on Partially Reconfigurable FPGAs |
A. Morales-Villanueva, A. Gordon-Ross |
PDF |
2014 |
Single-Event Characterization of the 28 nm Xilinx Kintex-7 Field-Programmable Gate Array under Heavy Ion Irradiation |
David Lee, Michael Wirthlin, Gary Swift, Anthony Le |
PDF |
2014 |
A Multi-tiered Optimization Framework for Heterogeneous Computing |
A. Milluzzi, J. Richardson, A. George, H. Lam |
PDF |
2014 |
A Method and Case Study on Identifying Physically Adjacent Multiple-Cell Upsets Using 28-nm, Interleaved and SECDED-Protected Arrays |
M. Wirthlin, D. Lee, G. Swift, and H. Quinn |
PDF |
2014 |
New approaches for in-system debug of behaviorally-synthesized FPGA circuits |
Josh Monson and Brad Hutchings |
PDF |
2013 |
Optimization techniques for a high level synthesis implementation of the Sobel filter |
Josh Monson, Michael Wirthlin, Brad Hutchings |
PDF |
2014 |
Symbiotic Scheduling of Concurrent GPU Kernels for Performance and Energy Optimizations |
T. Li, V. K. Narayana and T. El-Ghazawi |
PDF |
2014 |
CERE: a CachE Recommendation Engine: Efficient Evolutionary Cache Hierarchy Design Space Exploration |
G. Yessin, A. A. Badawy, V. Narayana, D. Mayhew, and T. El-Ghazawi |
PDF |
2014 |
Simulative analysis of a multidimensional torus-based reconfigurable cluster for molecular dynamics |
A. Lawande, H. Yang, A. George, and H. Lam |
PDF |
2014 |
CSP: A Multifaceted Hybrid Architecture for Space Computing |
D. Rudolph, C. Wilson, J. Stewart, P. Gauvin, A. D. George, H. Lam, G. Crum, M. Wirthlin, A. Wilson, and A. Stoddard |
PDF |
2014 |
CSP: A Multifaceted Hybrid System for Space Computing |
P. Gauvin, J Urriste, D. Rudolph, J. Stewart, C. Wilson, C. Morales, A. George, H. Lam, A. Stoddard, A. Wilson, M. Wirthlin, G. Crum |
PDF |
2013 |
CHREC Space Processor (CSP): A Broad Vision for Hybrid Space Computing |
C. Wilson, J. Urriste, P. Gauvin, J. Stewart, A. George, H. Lam, T. Flatley, G. Crum, M. Wirthlin |
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2014 |
Comparative Analysis of Present and Future Space Processors with Device Metrics |
T. M. Lovelly, K. Cheng, W. Garcia, and A. D. George |
PDF |
2013 |
Task Scheduling for Reconfigurable Systems in Dynamic Fault-Rate Environments |
A. Jacobs, N. Wulf, and A. George |
PDF |
2017 |
Optimizing FPGA Performance, Power, and Dependability with Linear Programming |
N. Wulf, A. George, A. Gordon-Ross |
PDF |
2013 |
BSW: FPGA-Accelerated BLAST-Wrapped Smith-Waterman Aligner |
B. Lam, C. Pascoe, S. Schaecher, H. Lam, and A. George |
PDF |
2014 |
Benchmarking Parallel Performance on Many-Core Processors |
B. Lam, A. Barboza, R. Agrawal, A. George, H. Lam |
PDF |
2014 |
A Framework to Analyze Processor Architectures for Next-Generation On-Board Space Computing |
T. M. Lovelly, D. Bryan, K. Cheng, R. Kreynin, A. D. George, A. Gordon-Ross, and G. Mounce |
PDF |
2014 |
Multi-bit Fault Injection for FPGAs with SPFI |
G. Cieslewski, A. Jacobs, A. George, and A. Gordon-Ross |
PDF |
2013 |
Improving Clock-Rate of Hard-Macro Designs |
Christopher Lavin and Brent Nelson and Brad Hutchings |
PDF |
2013 |
Impact of hard macro size on FPGA clock rate and place/route time |
Lavin, C.; Nelson, B.; Hutchings, B. |
PDF |
2013 |
Rapid FPGA design prototyping through preservation of system logic: A case study |
Haroldsen, T.; Nelson, B.; White, B. |
PDF |
2013 |
Implementing high-performance, low-power FPGA-based optical flow accelerators in C |
Monson, J, Wirthlin, M, and Hutchings, B. L. |
PDF |
2013 |
Characterization and Mitigation of the MGT-Based Aurora Protocol in a Radiation Environment |
Harding, A. Ellsworth, K., Nelson, B. and Wirthlin, M |
PDF |
2014 |
Soft Error rate estimations of the Kintex-7 FPGA within the ATLAS Liquid Argon (LAr) Calorimeter |
Michael Wirthlin, Helio Takai, and Alex Harding |
PDF |
2009 |
Exploiting Partially Reconfigurable FPGAs for Situation-Based Reconfiguration in Wireless Sensor Networks |
R. Garcia, A. Gordon-Ross, and A. George |
PDF |
2009 |
On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat) |
M. Caffrey, K. Morgan, D. Roussel-Dupre, S. Robinson, A. Nelson, A. Salazar, M. Wirthlin, W. Howes, D. Richins |
PDF |
2009 |
Efficient Mapping of Hardware Tasks on Reconfigurable Computers using Libraries of Architecture Variants |
M. Huang, V. Narayana, and T. El-Ghazawi |
PDF |
2009 |
SCORES: A Scalable and Parametric Streams-Based Communication Architecture for Modular Reconfigurable Systems |
A. Jara-Berrocal and A. Gordon-Ross |
PDF |
2009 |
Bitstream Relocation with Local Clock Domains for Partially Reconfigurable FPGAs |
A. Flynn, A. Gordon-Ross, and A. George |
PDF |
2009 |
RDMS: A Hardware Task Scheduling Algorithm for Reconfigurable Computing |
M. Huang, H. Simmler, O. Serres, and T. El-Ghazawi |
PDF |
2009 |
RAT: RC Amenability Test for Rapid Performance Prediction |
B. Holland, K. Nagarajan, and A. George |
PDF |
2009 |
Adaptive Software-based Fault Tolerance for Space Multicore Processing |
A. Jacobs, G. Cieslewski, and A. George |
PDF |
2009 |
Space Applications on Tilera," Workshop for Multicore Processors For Space - Opportunities and Challenges |
J. Richardson, C. Massie, H. Lam, K. Gosrani, and A. George |
PDF |
2009 |
MACS: A Minimal Adaptive Routing Circuit-Switched Architecture for Scalable and Parametric NoCs |
R. Kumar and A. Gordon-Ross |
PDF |
2009 |
Noise Impact of Single-Event Upsets on an FPGA-Based Digital Filter |
B. H. Pratt, M. Wirthlin, M. Caffrey, P. Graham, K. Morgan |
PDF |
2009 |
A Multi-Layered XML Schema and Design Tool for Reusing and Integrating FPGA IP |
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PDF |
2009 |
Reconfigurable Fault Tolerance: A Framework for Environmentally Adaptive Fault Mitigation in Space |
A. Jacobs, A. George, and G. Cieslewski |
PDF |
2009 |
On FM Demodulators in Software-Defined Radios Using FPGAs |
M. Rice, M. Padilla, B. Nelson |
PDF |
2009 |
Synchronization Issues of TMR Crossing Multiple Clock Domains |
Y. Li, B. Nelson, and M. Wirthlin |
PDF |
2009 |
Reduced Cost Reliability via Statistical Model Detection |
J. Anderson, B. Nelson, and M. Wirthlin, |
PDF |
2009 |
Fault-Tolerant Block-RAM Memories in SRAM-Based FPGAs |
N. Rollins and M. Wirthlin |
PDF |
2009 |
Run-Time FPGA Partial Reconfiguration for Image Processing Applications |
S. Yousuf and A. Gordon-Ross |
PDF |
2009 |
A Framework for Core-level Modeling and Design of Reconfigurable Computing Algorithms |
G. Wang, G. Stitt, H. Lam, and A. George |
PDF |
2009 |
SCF: A Device- and Language-Independent Task Coordination Framework for Reconfigurable, Heterogeneous Systems |
V. Aggarwal, R. Garcia, G. Stitt, A. George, and H. Lam |
PDF |